IEEE-CNSV  Consultants' Network of Silicon Valley   CaliforniaConsultants.org
Bringing together consultants, clients and interested parties to exchange ideas about electrical, electronic and software engineering. IEEE-CNSV: Consultants' Network of Silicon Valley
CaliforniaConsultants.org

CNSV Consultants' Directory

Results 71 - 80 of 204
pages 1 ¦ 2 ¦ 3 ¦ 4 ¦ 5 ¦ 6 ¦ 7 ¦ 8 ¦ 9 ¦ 10 ¦ 11 ¦ 12 ¦ 13 ¦ 14 ¦ 15 ¦ 16 ¦ 17 ¦ 18 ¦ 19 ¦ 20 ¦ 21
Nathan Iyer    Affiliate Member Nathan Iyer
RF/Analog System/IC design Analog Design Verification, HDL Verilog
Jim Jacob    Member Actinix
UV lasers, optics, non-linear optics, acousto-optics.
Jon A. Jenny    Member Consultant
Systems engineering, electrical engineering, engineering management, program management. Medical Device V&V Testing, Systems Engineering Communication, biotechnology and embedded systems, board design, layout and test. Experienced advisor to startups; expert witness on patent infringement in e-commerce and databases. Complete system design (digital, software & PCB) through production. Certified Microchip Consultant. Embedded systems, DSP, telecommunications, embedded control, audio, video.
Tony Khoshaba    Affiliate Member ComputingAssociate.com
Embedded firmware, C, C++, networking, Linux, VxWorks, telecommunications, medical devices. Consumer Electronics Architecture, mobile, low-power, SOC, CMOS, MP3, HDMI, USB, PLL, VCO, etc. ...

Consultant Details

Nathan Iyer   Affiliate Member Nathan Iyer
3120 De La Cruz Blvd., Suite 119
Santa Clara, CA 95054
408.727.1129
408.421.3922 (cell)
nathan.iyer@gmail.com
www.creorf.com

RF/Analog System/IC design, Analog Verification, HDL Verilog

Experience:

  • IC Design/Verification
  • RF blocks (LNA, PA, Mixer, Switches)
  • Mixed-Signal (DAC, ADC, OpAmps, Bandgaps, integer/Frac-N PLL)
  • Digital Circuitry (Filter, Receiver Algorithms, State-Machines, Serial Interfaces, Encoders, Decoders using Verilog HDL)
  • IC Layout and Verification
  • Top-down design verification approach for large mixed signal ICs using functional models
  • Reference Board Design, Software and Drivers
  • Design verification and testing for RFID reader chip
  • Serial port, RFID Gen2 Decoder and FIFO, successful real-time FPGA verification, taped out ASIC version
  • 802.11 RF Blocks, Integer PLLs, Frac-N PLLs, DACs, LNAs, Mixers, PA Drivers, VCOs, Digital Filters
  • RF Medical Devices

IC Design Software:

  • Agilent ADS (Linear/Nonlinear/Ptolemny)
  • Cadence DFII : Analog/RF Design Environment
  • Agilent RFDE and Dynamic Link

Math programs and system simulator programs:

  • Matlab/Simulink
  • Xilinx System Generator
  • Synplify DSP

Digital design and verification programs:

  • Xilinx ISE
  • ModelSim

Layout Programs:

  • Cadence Virtuoso Layout Editor (IC Layout)
  • Cadsoft Eagle Layout Editor (Board Layout)

Programming Languages:

  • Verilog
  • Matlab
  • C/C++

Patents and Publications:

  • US 6285239, July 2000, Feed-Forward Biasing for RF Amplifiers II
  • Microwave Journal, February 2000, A PA Driver for Split-Band Application
  • RF Design magazine, June 1999, Improve efficiency of RF Power Amplifiers
  • US 6130579, March 1999, Feed-Forward Biasing for RF Amplifiers I
  • US 5723001, March 1998, Apparatus and method for therapeutically treating human body tissue with electromagnetic radiation
  • RF Design magazine, February 1997, Custom Control Software Tool for Smith charts
  • A Titanium-dioxide Based Ceramic Composite Dispersed with Conducting Inclusions as an EMI Shielding Material, Proc. 1993 IEEE International Symposium EMC, August 9-13, 1993, Dallas,


Home ¦  About CNSV ¦  Sitemap ¦  Privacy Statement ¦  Terms of Use ¦  Contact Us ¦  Created by Expert Software Consulting

Copyright © 1996 - 2010 by IEEE Consultants' Network of Silicon Valley, All rights reserved