Teruo Utsumi - IEEE-CNSV: Consultants

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Teruo Utsumi Affiliate Member Mugen Computing

FPGA & ASIC design, high-performance computing, supercomputers

Consultant Details

Teruo Utsumi Affiliate Member Mugen Computing

102 Almond Hill Ct.
Los Gatos, CA 95032-1803
408.370.9147
408.583.7412 (cell)
teruo@mugencomputing.com
mugencomputing.com

FPGA & ASIC Design, Supercomputers

Teruo Utsumi has over 20 years of experience in computer hardware. His FPGA and ASIC design services include:

optimization of the hardware implementation of algorithms
chip design optimization at both high and micro-architectural levels
high performance computer architectures
staff training on FGPA resource utiliization to maximize speed and minimize chip utilization
analysis of the interactions between hardware and software
RAS (reliability, availability, and serviceabilility)
testing
design and design review

Teruo is a co-inventor of eleven patents.