Kiran Gunnam Ph.D., IEEE Senior Member

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Kiran Gunnam , Ph.D., IEEE Senior Member Member LSI Corporation

Signal processing, HDD, Flash Memory, Storage,LDPC error correction, ASIC, FPGA, DSP, Semiconductors

Consultant Details

Kiran Gunnam, Ph.D., IEEE Senior Member Member LSI Corporation

Principal ASIC Design Engineer
Milpitas, CA
408.802.7966 (cell)
kgunnam@ieee.org
www.lsi.com

DSP, ECC, LDPC, Flash, ASIC,FPGA, u-architecture, RTL design

IEEE Senior Member.

Extensive experience and expertise in:

Communications, Signal processing and VLSI
Hardware friendly algorithms, Hardware architecture, micro-architecture, FPGA and ASIC implementation

Low-density parity-check (LDPC) error correction code (ECC) systems

Encoders
Decoders
Error floor estimation and mitigation
Interleavers
Queuing systems
Hard disk drive magnetic recording channels
Flash memory read channel
Hardware friendly algorithms, Hardware architecture, micro-architecture, FPGA and ASIC implementation for the above.

Skill set: Matlab, C, Verilog, VHDL, Cadence/Synopsys tools, FPGA tools

40 patent applications

published applications so far: http://tinyurl.com/3jpwhwa