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Result for Bob Strain
Device physics, IC design, patent & trade secret litigation, CCD, wafer fab and foundry, memory.

Consultant Details

7160 Echo Ridge Dr.
San Jose, CA 95120-4718
408.823.9650
bob@rstrain.com
www.rstrain.com

Device Physics, IC Design, Patent & Trade Secret Litigation

Integrated circuits, from basic technology through applications:

  • Adviser to National Semiconductor in support of their Wafer Foundry activities
  • Nif/T New Business Architects on two specific projects, one an IP based start-up
  • Trade secret and patent actions, including a Santa Clara-based IC manufacturer and the suits prompted by the theft of processing information in Asia.

Past experience includes:

  • actively participating in the early development of Charge Coupled Devices (CCDs)
  • involvement in memory products, including product development, product management and business analysis
  • project management for a state-of-the-art wafer fab in Nagasaki, Japan
  • co-authoring a ten-year outlook for key IC markets
  • technical liaison with several active foundries, ranging from linear bipolar technologies to advanced CMOS and FLASH technologies
  • management of CMOS process development
  • inventing or co-inventing 31 US patents


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