Peter is a systems engineer and product developer, and has authored 21 issued patents plus several new patents in progress. He is currently a CNSV At-Large Director, and is founder and Co-Chair of its Intellectual Property Special Interest Group (SIG).

Peter is expert in the following areas:

• Systems Engineering
• Semiconductor Packaging
• Product development and associated IP development
• Retractable devices

Peter is experienced in litigation support and product tear down analysis.

Peter's electronic packaging inventions include new flip chip connectors; rework for high assembly yield; advanced cooling methods; copper cooling channels; a new test methodology for high speed functional test at the system level; test chips employing parallel sampling; wafer-level packaging approaches; and a solder free assembly method using stud bumps and conductive wells.

As a technologist and system designer Peter has invented and developed multiple system hardware and software designs to various levels of maturity. Commercial systems include a high speed printer employing dry toner, electrostatic imaging and voltage traveling waves; electrostatic motors and generators operating at high voltage and having compact size and high energy efficiency; 3D electronic systems including stacked semiconductor devices and solder-free assembly methods. Military systems include reconnaissance systems having multiple air-borne vehicles, platforms and ground stations.

Peter has presented many conference papers and technical talks. He won the Best of Conference Award at the 2nd International Wafer Level Packaging Conference in San Jose, CA, for his paper Repairable 3D Semiconductor Subsystem.