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Expert witness in the determination of root cause of materials failures Software. real time embedded systems.
Jack Morris, BSEE   At-Large Director Baywood Solutions
Embedded system h/w design/development, Technical litigation support, Program/Project management New product introduction for software firms.
Hafiz Nijim  Member ProtoQuick
Medical devices, lasers, system architecture. Embedded, analog, digital and mixed signal design.
Erumusele Odigie  Member Consultant
DSP systems, signal processing, algorithm design and embedded systems. Communication System, Logic Development, Forward Error Correction, Simulation Medical Device, Mechanical Design, Finite Element Analysis, Failure Analysis, Expert Witness, Patent Algorithm design for data compression and image processing Automation, Control systems. Embedded. Instrumentation, Semiconductor Equip. Serial Communications.

Consultant Details

24771 Summerhill Ave.
Los Altos, CA 94024
650.941.2954
650 704 9645 (cell)
650 949 2948 (fax)
mpaff@paffengineering.com
www.paffengineering.com

Communication System and Signal Processing

Product Development

Areas of Specialization

  • Communication System Simulation (SPW, COSSAP, Matlab, Verilog, System View)
  • Logic Design
  • Standards Based PHY Development
  • Forward Error Correction (Viterbi, Reed Solomon, OFDM interleaving and deinterleaving), equalization
  • FPGA Verification (Altera Quartus)
  • Point-to-Point Wireless, Cable, Satellite
  • OFDM, QPSK, QAM, CPM
  • Non-linear predistortion
  • GSM, GPRS, GPS, 802.16, 802.15, DOCSIS, DVB-S, DVB-C, DVB-H, ATSC, ARTM
  • 802.16 logic cores available
  • Standards Body Participation
  • Test and Documentation

Mike Paff specializes in implementation and verification of the baseband PHY layer logic. This includes everything from interpolators, filtering, tracking loops, synchronization, interleaving and deinterleaving, error correction encoding and decoding as well as modulation. He has performed system engineering and logic design for successful integrated circuit developments including: DVB-S, GPRS, DVB-C downstream, 802.15 3a (MBOA), and he has developed IP core logic for the 802.16 (OFDM) standard. Mr. Paff is familiar with the Altera Quartus design environment and is a strong believer in FPGA verification before commitment to Silicon.

Developing successful integrated circuits which comply with the complex communication standards of today, requires extreme attention to detail and a design methodology which efficiently identifies and resolves every design issue. This methodology requires development of a bit-true behavioral model of the target system in Matlab or SPW, then rigorous comparison of logic simulation results with the behavioral model. Once this level of development is complete, the FPGA platform is used to verify digital/RF interfaces, PHY/MAC interfaces and developing software drivers.


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