Richard L. Lozes Ph.D. - IEEE-CNSV: Consultants

CNSV Consultants' Directory

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Mark M. Kwan Affiliate Member Winmac Consulting, Inc.

iOS, Windows, database, GUI, OOA, OOP, OOM, C++, C#

Robert W. Lamkin Member Trailblazer Design

Product development, embedded systems, medical products, digital & analog circuit design, software.

Orin Laney , PE, NCE Member Atwood Research

Mixed signal and analog design, RF instrumentation, design for EMC compliance, signal integrity.

Tal Lavian , Ph.D. Member Patent Innovations Consulting

Network Architecture, TCP/IP, Routing, Switching, Wireless, VoIP, Patents, Expert Consultant

Bernard Lei Affiliate Member Lei's Design Services

Verilog, System Verilog, design verification, VERA, Perl, C, C++, assembly, RTL, ModelSim, UNIX

Daniel Leu Member INICORE, Inc.

FPGA & ASIC design, VHDL, Verilog, System-on-Chip (SOC).

Paul J. Lingane Member Lingane and Associates

Electronic Instrumentation and Product Development for Life Science, Analytical/Medical products.

Valentino Liva Member Euramnet, LLC

Communications:RF, LTE, WiMAX,Cable,Broadband, Wireless. Analog/Mixed Mode. ASICS, DSP, Antennas.

Gareth Loy , Dr. Member Gareth, Inc.

Digital Signal Processing (DSP), Software, Patent Litigation and Expert Witness services

Richard L. Lozes , Ph.D. Member Lozes Technology Consulting

Semiconductor maufacturing, e-beam lithography, IC mask design

Consultant Details

Richard L. Lozes, Ph.D. Member Lozes Technology Consulting

7417 Rolling Hills Circle
Dublin, CA 94568
925.285.5950 (cell)
richard_lozes@lozestech.com
www.lozestech.com

Semiconductor Manufacturing, E-Beam Lithography

System-level analysis and guidance for mask-making and maskless lithography. Technology development from concept and feasibility through system integration. Over 25 years experience in e-beam lithography.

Specialties:

Semiconductor mask-making
Mask-less lithography
Pattern generation systems development

Experience includes:

Concept and feasibility management
Technology development
Algorithm design
Simulation
Error budgeting
Throughput analysis
Contract negotiation

Intellectual property experience:

IP strategy development
Competitive portfolio analysis
Technology licensing
Inventor on 9 patents, including electron optics, system writing strategy, pattern data rasterizer, figure tiling, critical dimension corrections and placement corrections

Led the team that invented an electron optics which had been considered impossible for the last 30 years. The resulting architecture was capable of writing 32nm node IC designs in 8 hours, far faster than any competitive offering.